This non-provisional application claims priority under 35 U.S.C. § 119(a) on Korean Patent Application No. 2004-111925 filed on Dec. 24, 2004, which is herein expressly incorporated by reference.
1. Field of the Invention
Embodiments of the present invention relate, generally, to a memory device, and, more particularly, to a memory device including a memory layer having quantum dots uniformly dispersed in an organic material disposed between an upper electrode layer and a lower electrode layer, which is advantageous because it is nonvolatile and inexpensive, and realizes high integration, low power consumption, and high speed switching.
2. Description of the Related Art
With the rapid development of the information and communication industries, the demand for various memory devices has drastically increased. In particular, memory devices used for portable terminals, various smart cards, electronic money, digital cameras, games, MP3 players, etc. must be nonvolatile, so that the recorded information is not lost even when no power is consumed. A typical representative of the nonvolatile memory is flash memory, which is formed of a silicon material and has monopolized the memory market.
However, conventional flash memory is disadvantageous because it may be recorded and erased a limited number of times and has a slow recording speed. Further, in order to manufacture flash memory having a high memory capacity, line width per unit area should be decreased, which increases process costs resulting in high costs to manufacture memory chips. Moreover, due to difficulties in chip manufacturing techniques it is difficult to further miniaturize the chips. Due to technical limitations imposed on manufacturing the conventional silicon flash memory, attempts to develop next-generation nonvolatile memory devices, which realize ultrahigh speeds, high capacities, low power consumption, and low prices while overcoming the physical limitations of the above memory devices, have been vigorously made.
The next-generation memory devices include, for example, ferroelectric RAM, magnetic RAM, phase change RAM, nanotube memory, holographic memory, organic memory, etc., depending on the kind of material constituting a unit cell in a semiconductor. Of these memory devices, organic memory achieves memory capability using bistable resistance values caused by applying voltage to an organic material layer positioned between upper and lower electrode layers. That is, the organic memory is a type of memory that is able to read and write data ‘0’ and ‘1’ while the resistance or capacitance of the organic material present between the upper and lower electrode layers is reversibly changed in response to electrical signals. Thus, the organic memory functions to solve the problems of processability, manufacturing costs and integration, while exhibiting the nonvolatile characteristics of conventional flash memory, and is widely expected to be the next-generation memory technology.
In this regard, Japanese Patent Laid-open Publication No. Sho. 62-95882 discloses an electrical memory device using CuTCNQ (7,7,8,8-tetracyano-p-quinodimethane) as a charge transfer complex containing an organic metal. U.S. Serial No. 2002-163057 discloses a semiconductor device including a middle layer made of a mixture of an ionic salt such as NaCl or CsCl and a conductive polymer, interposed between upper and lower electrode layers. Such a device manifests switching/memory properties by charge separation in an electrical field. In addition, U.S. Pat. No. 6,055,180 discloses a memory device using ferroelectricity depending on a crystalline phase of a fluorine based polymer, such as poly(vinyldifluoroethylene).
On the other hand, the manufacturing method of the conventional organic memory device further includes an electroforming process, which applies high voltage to the manufactured memory device. As such, the electroforming process is used to pulverize a metal for an electrode to ones of nm size and then allow the pulverized metal to move between organic layers (J. Phys. D: Appl. Phys., 35, 802 (2002)). In the electroformed memory device, an NDR (Negative Differential Resistance) section is formed, thus manifesting memory properties. However, since the electroforming process cannot control the size or size distribution of metal particles, the physical properties of the devices are inconsistent. At this time, memory behavior, as well as the operating voltage and operating current of the memory device, varies and contributes to inconsistent device properties, which reduces the reproducibility and results in severely defective products. To omit the electroforming process, methods of forming a metal layer embedded within the organic material have been proposed (Appl. Phys. Lett., 80, 2997 (2002) and Appl. Phys. Lett., 82, 1419 (2003)). As such, however, it is difficult to control the size of metal particles and interparticle intervals. Further, only when depositing the metal at a very low speed are desired memory properties obtained, and thus, the above method cannot be actually applied.